suffix is defined this way), then write
the generic rule for the suffixes. In
the case described above, you would
.SUFFIXES: .o .c
cc -O -Wall $<
You may note that in the case of
suffix rules, the dependency suffix
goes before the target suffix, which is
a reversal from the normal order in a
makefile. You also will see that you
use $< in the command, which evaluates to the .c filename associated with
the .o file that triggered the rule.
There are a couple predefined variables like this that are used exclusively
for suffix rules:
; $< — evaluates to the component
that is being used to make the
target—that is, file.c.
; — evaluates to the filename
part (without any suffix) of the
component that is being used to
make the target—that is, file.
Note that the variable cannot
occur in suffix rules, but the variable
still will work.
Command Special Characters
Certain characters can be used in
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conjunction with commands to alter
the behavior of make or the com-
mand. If you’re familiar with shell
scripting, you’ll recognize that \ sig-
nifies a line continuation. That is to
say, using \ means that the command
isn’t finished and continues on the
next line. Nobody likes looking at a
messy file, and using this character
at the end of a line helps keep your
makefile clean and pretty. If a rule
has more than one command, use a
semicolon to separate commands. You
can start a command with a hyphen,
and make will ignore any errors that
occur from the command. If you want
to suppress the output of a command
during execution, start the command
with an at sign (@).
Sometimes, you need more control
over how the makefile is read and
executed. Directives are designed
exactly for that purpose.
From defining, overriding or exporting variables to importing other
makefiles, these directives are what
make a more robust makefile possible.
The most useful of the directives are
the conditional directives though.
Conditional directives allow you to
define multiple versions of a command
based on preexisting conditions. For