Command lines must be indented with tab
characters; spaces cause funky errors.
This has been a design flaw in make for
decades. Empty lines must still have a
tab character or else make will throw a fit.
process. The more convoluted portion
of using make is constructing the
makefile. The makefile is a file that
consists of a series of rules that define
the dependencies of your project.
These rules govern the behavior of
make during execution.
Listing 1. Example Makefile
CC=g++ CFLAGS=-c -Wall LDFLAGS= SOURCES=main.cpp hello.cpp factorial.cpp OBJECTS=$(SOURCES:.cpp=.o) EXECUTABLE=hello
all: $(SOURCES) $(EXECUTABLE)
$(EXECUTABLE): $(OBJECTS) $(CC) $(LDFLAGS) $(OBJECTS) -o $@
.cpp.o: $(CC) $(CFLAGS) $< -o
Rules and Targets
Each rule in the makefile is an independent series of commands that are
executed in order to build a target.
Make does not necessarily run each
rule in order. Make will run through
the rules recursively, building each
target in turn, based on modification.
Rules are formatted like this:
target: dependency list ...
The target is typically the name of
a file, but it can be a phony target
(discussed later in this article). The
dependency list is a space-separated
list of files that designate whether the
; Comments start with a pound sign (#). ; Continuation of a line is denoted by a
back slash (\). ; Lines containing equal signs (=) are
variable definitions. ; Each command line typically is executed in
a separate Bourne shell—that is, sh1. ; To execute more than one command line
in the same shell, type them on the same
line, separated by semicolons. Use a \ to
continue the line if necessary.